Title: High-Speed Camera Imaging of Arc Faults Anticipated in Fault Current Limited MVDC Systems
Authors: Dionne Soto, Ruturaj Soman, Mike Sloderbeck, Michael Steurer, and Peter Zeller
Abstract: The Modular Multilevel Converter (MMC) has several advantages when used as an AC/DC interface in an MVDC system, one of which is the ability to limit fault currents. In this study several different arc fault experiments are conducted in a real-time Power Hardware-in-the-Loop simulation (PHIL) utilizing the MW-scale test facility commissioned at the Florida State University - Center for Advanced Power Systems (FSU-CAPS) [1] which is described in detail in [2]. Previous work was conducted to study the current limiting aspect of these MMCs [3]. In this study, a high-speed camera is utilized to capture high resolution images of the arc which will aid in studying the arc and future development of an arc fault model to be utilized in offline simulations. Previous work on arc faults modeling in DC systems was conducted [4], but it was focused on series faults on the DC bus. This work focuses on rail-to-rail faults. A Controller Hardware-in-the-Loop (CHIL) setup was developed [3] for real-time verification of the fault current limiting function of MMC converters and for de-risking experiments prior to conducting the PHIL tests. Figure 1 illustrates one of several an arc fault tests conducted.
References:
1. M. Sloderbeck, K. Schoder, J. Leonard, C. Edrington, M. Steurer, “Development of a 5 MW, 24 kV DC power hardware in the loop laboratory based on modular multilevel converter (MMC) technology,” ASNE EMTS 2014, Philadelphia, PA.
2. M. Steurer, et al., “Multifunctional megawatt scale medium voltage DC test bed based on modular multilevel converter (MMC) technology,” ESARS 2015, Aachen, Germany.
3. K. Sun, D. Soto, M. Steurer, M.O. Faruque, “Experimental verification of limiting fault currents in MVDC systems by using modular multilevel converters,” IEEE ESTS 2015, Alexandria, VA.
4. Uriarte, F.M.; Gattozzi, A.L.; Herbst, J.D.; Estes, H.B.; Hotz, T.J.; Kwasinski, A.; Hebner, R.E., "A DC Arc Model for Series Faults in Low Voltage Microgrids," in Smart Grid, IEEE Transactions on , vol.3, no.4, pp.2063-2070, Dec. 2012